## Dec 9, 2015

### VCO part 1: core

A synth needs oscillators, and while it is fairly easy to make things oscillate, building a tunable and stable comes with some difficulties. First I was thinking not to go DIY at all for this, but I finally decided to build VCOs based on Yusynth's design. Here I present the first part of the circuit: the 'core' oscillator taking V/Oct inputs, and producing sawtooth outputs.

This sub-module contains the oscillator core, exponential converter with V/Oct inputs, and sawtooth outputs, so it is usable as a complete module on its own. Wave-shaping to produce other waveforms will be done on a separate board, and discussed in a separate article. Here, I first discus the most important parts of the circuit separately, and then give the full circuit. This article has a lot of detail, but you can skip ahead if you just want to see the circuit.

### Oscillator core

The oscillator core is a fairly standard sawtooth core, taken directly from Yusynth. It was a bit tricky for me to understand at first, so it deserves some explanation.

The basic idea is as follows. First we assume C1 is initially discharged. The voltage at C1 is buffered by U2c, such that the voltage at point A is initially 5V. The current source forces a current Ic through the capacitor, which means the capacitor must charge up and the voltage at A goes down linearly in time. U1 is a comparator, comparing voltage A with voltage B, the latter of which is 0V. When A goes below 0V, the comparator trips, and briefly activates Q1. Q1 is a JFet switch, that very quickly allows the capacitor to discharge, until A is at 5V again and the cycle starts over. The frequency is determined by the current Ic.

But how does the comparator circuit work in detail? To make this easier to understand, I have drawn what the waveforms at A,B, and C look like (schematically):

First, a bit about the JFet. A JFet conducts when the gate voltage (the arrow) is equal to either the source or drain voltage (most JFets are symmetric between source and drain). If the gate voltage goes negative to a certain 'Pinch-off' voltage (between -3V and -10V for J111), the JFet stops conducting.

First, we look at the down-ramping phase at point A. During this time, A is positive, and B is at 0V. This means the comparator output is low (B < A), and the voltage at point C is pulled to -12V. This propagates through the diode, and is low enough for Q1 to be pinched off.

Now, when the voltage at A reaches just below 0V, the comparator output flips to high. Voltage C jumps to +12V, but the diode and R2 clamp it to +5V at the Q1 gate. This makes Q1 conduct, and C1 quickly discharges, such that the voltage A goes back to 5V and the cycle starts over again.

In this description one step is missing: Q1 has to be on long enough such that C1 can discharge completely. This is where C2 and R5 come in: they form a high-pass filter, creating positive feedback from output C back to B. This creates a positive spike at B, keeping the comparator on for a while (B > A). C2 and R5 are chosen such that the spike constant is as short as possible, while still allowing C1 to properly discharge (the discharge time is less than 1 us, and much shorter than drawn in the picture).

### Current source

Now, we need a current source (or more accurately, current sink) that creates the current Ic. In order to have 1V/Oct tracking, the current Ic should be the exponential of the input control voltage. I use a standard arrangement, but it is worth explaining. For a much more detailed explanation and more circuit variations, see this page by René Schmitz. Here is the schematic for the current sink:

#### Exponential current sink

The current sink is drawn in the right half of the schematic. As already discussed in the article about transistor matching, a simple transistor is an exponential voltage-to-current converter. The emitter current IE is given by the equation

where VBE is the base-emitter voltage, IS is the saturation current, and

is the thermal voltage. The approximation holds for IE >> IS. The collector current Ic (which is the 'output' of this subcircuit) is practically equal to the emitter current. The problem is that this function has a strong temperature dependence, directly via VT and indirectly through IS, which changes strongly with temperature. To cancel the temperature dependence of  IS, a matched pair Q2, Q3 is used in a current mirror configuration. To understand this, first assume Vb1 = Vb2 = 0V. Because the emitters of Q2 and Q3 are tied toegether, this means they both have equal VBE and, if they are at the same temperature, equal emitter currents. Now, the opamp U2a is configured as a voltage-to-current converter, forcing the current Iref defined by R1 (5V over 1MOhm gives 5 uA) through Q2. The current mirror action makes the same current go through Q3, giving an output current of 5 uA independent of temperature.
Of course we want to change the output current with a voltage, which can now be done by making Vb1 and Vb2 unequal. The output current is given by

We feed the control voltage to Vb1 (and keep Vb2 at 0V). Using VT  = 25 mV (at room temperature), this equation works out to -17.3 mV per octave, meaning that every time we lower Vb1 by 17.3 mV, Ic doubles.

This equation is of course only an approximation. For very small currents, the -1 neglected previously plays a role, but that is of no practical importance because IS is typically very small. More importantly, for large currents the exponential breaks down, and Ic is limited by the effective internal resistance of the transistor. This is usually dealt with using some sort of 'high frequency trim' (see René Schimtz' page), but I found I can get very satisfactory results by simply using small currents only, feeding in a negative CV offset for low frequencies.

Finally, to use a 1V/octave control voltage, we need to make a voltage divider with a ratio of 0.0173 (and an inverter, but that will follow later). However, here the second temperature dependence comes into play...

#### Resistor divider and tempco

The temperature dependence of VT is less severe than that of IS, but it is a nasty one as it affects the V/octave tracking rather than a tuning offset. VT  scales with the absolute temperature T (in Kelvin),

where kB is Boltzmann constant and q is the electron charge. The standard way to compensate for this, is to make a voltage divider with a special tempco resistor, whose resistance also changes linear with absolute temperature. These are a bit harder to get, though, and I used a standard NTC (negative temperature coefficient) resistor in stead. The circuit is given on René Schmitz' page, but I adjusted the values a bit to get a good match for my resistor. I used a Vishay 4.7k NTC resistor, which has detailed equations for the temperature dependence in the datasheet. The voltage divider shown above gives the following output ratio (blue line):

The yellow line is the ideal voltage divider ratio. For temperatures from about 15-40 degrees C the match is very close, which is good enough for me.

### Complete circuit

Below is the complete circuit diagram for the VCO core, and some notes about the circuit:

#### Supply voltage rejection

It's important that the VCO frequency doesn't change when there is noise or changes of the power supply. I used an LM336/5 zener diode (D2) to generate a stable 5V reference. This reference is used for all things that determine the frequency:
• Iref (set by R1)
• The saw amplitude (C1 resets to Vref and ramps down to 0V)
• The CV input summer U2b, as well as the course and fine tuning pots (not shown in the diagram).
The last one deserves an extra note. U2b sums the CV inputs, and inverts them to provide -1V/octave to the tempco divider. To get a good tuning range, some negative CV offset is needed, but instead of tying one leg of the tuning pot to -12V (which would make it sensitive to supply fluctuations), the tuning pot(s) are connected only to the 5V reference (and ground), and a part of the 5V reference is added to U2b's positive input. This seemed a good idea, but later I realized the downside: the negative input of U2b is now regulated to 2.5V, and the VCO frequency changes when plugging in a CV cable carrying 0V. The best solution would be to create a -5V reference (for example with an inverting opamp), and use that as tuning offset.

Apart from the supply voltage, there is also a chance the "ground" potential may fluctuate when something is drawing current. I noticed this with the VCO on the breadboard - drawing current on one side of the board can easily change the ground rail by 10 mV, and inside the exponential converter, that is more than half an octave! Therefore, take care to create low-impedance ground paths, especially the points marked with * in the schematic.

Note: In general, a good precaution for any VCO is to connect the power lead as close as possible to the power supply regulators, or even connect current-hungry modules (or ones with problematic blinking leds) on a separate bus board from the VCOs.

#### Other parts

In addition to the exponential frequency CV, a linear FM input is added. This input simply changes Iref (U2a sums the linear FM with the voltage over R1).

I added hard and soft sync inputs as Yusynth has them. They seem to work, but I have to experiment with the sync more to see if it needs any changes. The hard sync changes the comparator level (point B in the first figure), and a high input voltage will even stop the VCO completely. The soft sync lets the VCO operate as normal, but on sharp rising edges in the sync input it resets the VCO. Note that the hard and soft sync should not be connected at the same time (best to use a switch).

U2d inverts the output, amplifies and shifts it (with trimpot R23) from 0-5V to +/-5V. Two outputs are drawn, one (with series resistor) to connect to the output jack, and the other that will be used for the wave-shaping circuit. The power and ground lines are also connected through to the wave shaping circuit (not shown).

#### Components

All components are standard ones, but a few notes:
• C1 should ideally have a low temperature coefficient. Yves Usson specifies silver mica, but they are hard to get and probably overkill. I used C0G (or NP0) ceramic, which are specified at max +/- 25 ppm/degree C. A polypropylene cap is also still acceptable, with a temperature coefficient of 200 ppm/degree C. In any case, temperature dependence is still probably dominated by the exponential converter.
• For best tracking with multiple V/octave inputs, R17, R18 and R19 should be hand-matched to 0.1% or so (but I didn't myself bother).
• The tempco resistor R10 is a Vishay NTCLE100E3472JB0 4.7k NTC resistor. Probably any 4.7k NTC can be used, but it's best compare the temperature coefficients in the datasheet.

### Built circuit

I built two VCO cores, each on a small prototype board (this type). The lower board in the picture is the VCO core, the upper board contains wave shaping for pulse, triangle and sine waves (more on that later). Saw output waveform

Performance of the module is good. It tracks 1V/oct from 50Hz up to several kHz. At higher frequency it is a bit too low, a high frequency trim could be added if that is a concern. The saw has a very sharp edge. The potential tuning range (but not 1V/oct tracking) extends from sub-audio (I tried down to about 1 Hz, it might go lower for LFO use) to supersonic frequencies (>40 kHz). Spectrum of saw waveform
Here is a spectrum of the saw output, recorded with a cheap sound card and this program. The sound card is so cheap that it doesn't have anti-alias filtering, and frequencies above 22050 Hz 'fold back'. In the spectrum you can see this folding effect even a second time again at 0 Hz, which is caused by frequencies above 44100 Hz. The smallest harmonics at the right are thus actually above 60 kHz.